The internal ECC in basic DDR5 is intended to provide a reliability just good enough to be at the level of DDR4 without ECC (or maybe slightly above, but probably not a lot?), and likely the error rate would just be crazy high without any DDR5 internal "ECC" at all -- even without a rowhammer pattern or cosmic rays, etc. I not sure it will help against rowhammer (and variants)?
An improved rowhammer mitigation called Refresh Management (RFM) is part of DDR5 spec, but it’s optional and requires host OS support from what I’ve read.
SPECTRE is a CPU vulnerability in the speculative execution that modern processors perform to create a side channel to leak data through.
Could you elaborate on what you mean by DDR5 "suffering" from SPECTRE? I believe that vulnerability is memory technology agnostic and theoretically would work if you could boot a CPU absent any memory at all, as the leaks occur through CPU caches.
